Test socket systems are essential and widely used in design, development and manufacture of integrated circuit and semiconductor packages in the electronic arts. Such systems are typically limited by the particular architecture of the actual test socket that connects between terminals of such integrated circuit packages and the test equipment in final testing stages of design, development, prototyping and manufacturing of integrated circuit packages being tested or examined and are commonly referred to by an acronym DUT, meaning ‘Device Under Test’. Ideally, test sockets establish an electrical connection between terminals of a DUT and test equipment in a manner that both mechanically protects the IC terminals and minimizes interference with the electronic functionality of the IC package being tested.
Performance parameters required of test sockets directly relate to the operating frequencies, and electrical current capacity of high-performance DUT. Inductive, capacitive and resistive properties of test sockets must be minimized to preclude corruption or skewing of measured parameters generated by the DUT.
Z-axis anisotropic conductive, elastomer sheets shown in cross-section in FIGS. 1a, 1b, & 1c are a key element in existing test socket systems. Such anisotropically conductive elastomer sheets are commercially available from several manufacturers, and they are incorporated into the present invention as a component, without alterations. In particular, as shown in FIG. 1a, the electrically insulative sheet of a silicone elastomer 100 has a matrix of high density of electrically conductive columns 101 of embedded balls. The individual balls within each vertical column are in physical contact, for assuring electrical conduction perpendicularly relative to the sheet (Z-axis). Lateral electrical conduction in the X-Y plane of the sheet is precluded the insulating silicone material separates each individual column 101. As shown, the conductive ball columns 101 make electrical contact only with conductive traces 102, on a top surface of printed circuit board (PCB) 103 that are the located directly below them, leaving all other conductive ball columns unconnected. Similarly, the ball columns will only make electrical contact with electrical contacts located directly above the ball column. (See U.S. Pat. No. 6,702,587, R. E. Weiss, et al)
In FIG. 1b the Z-axis conductive sheet 100 is located between the printed circuit board 103 and a copper pillar terminal 104 of a semiconductor package DUT 105. A downward force, F, impressed on the DUT 105 compresses the elastomer sheet 100, buckling in the conductive ball columns 101 located directly beneath copper pillar 104. Both balls of buckled columns 101 and the balls at the ends of the ball columns 101 respectively remain in electrical contact with each other within the buckled column 101 and at the ends with the copper pillar 104 and the conductive traces 102 of the printed circuit board PCB 103 maintaining electrical connection between the PCB 103 and the copper pillar terminal 104. As in the uncompressed case, the insulating silicone material 100 separates each individual ball column 101 for precluding electrical conduction in the X-Y plane.
FIG. 1c shows a cross-section diagram of another type of Z-axis conductive elastomer sheet where the silicone insulating elastomer sheet 100 has a matrix of embedded electrically conductive, tilted parallel wire studs 107 available from Shin-Etsu Polymer Co., Ltd. (See http://www.shinpoly.co.jp/business/connector/) The top and bottom ends of each individual wire stud slightly extend beyond the top and bottom surface of silicone sheet 100 for assuring Z-axis electrical conduction through the sheet. Similarly, electrical conduction in the X-Y plane of the sheet 100 is precluded by the insulative silicone material embedding the wire studs 107. Conductive traces 102, located at the top surface of printed circuit board PCB 103 and solder ball 108 of semiconductor IC package (DUT) 105, are slightly offset horizontally relative each other to accommodate tilt of wire studs 102 as the elastomer sheet is compressed for preserving and minimizing resistance to electrical conduction between the traces 102 and the solder balls 108.
FIG. 2 is a cross-section diagram of a typical prior art flip-chip semiconductor device test socket 118, having a Z-axis conductive elastomer sheet 100 as contactor mechanism. (See also FIG. 5, Weiss, et al, supra). The main body 117 of the test socket 118 is precisely positioned by aligning pins 116 on, and is secured to a test PCB 103 by mounting bolts 115. The test PCB 103 has conductive metal contactor patterns 112 located beneath solder bumps 113 of the DUT 105, slightly offset relative to the bump pattern 113. The bumped DUT 105 is precisely positioned relative to the PCB pattern by means of a rectangular cavity formed within the lower center portion of the main body 117 of the test socket 118. Lid 119 is rotated counter-clockwise around pin 111, and held in that position while DUT 105 is placed into position above the Z-axis conductive elastomer sheet 100. After device insertion is completed, lid 119 is rotated clockwise, and then locked in position by latch mechanism 120. The amount of downward force applied to the semiconductor die 105 is controlled by coil spring 121.
Typical semiconductor test sockets that having mechanical features like those shown in FIG. 2, occupy approximately one to four square inches of printed circuit board space. As known in the testing art, for RF semiconductor devices other advanced power management switching integrated circuits, large mechanical structures enclosing semiconductor IC DUT packages affects placement of capacitive bypasses, couplings and other critical components in proximity of the DUT. While such critical components can often be placed on the opposite (bottom) side of the testing printed circuit board (PCB), parasitic inductance of such conductive paths through the PCB often can interfere with proper operation of the DUT.
Also, the complex mechanical designs of typical prior art test sockets (FIG. 2) present a number of fabrication challenges. Fabrication is labor intensive, and high mechanical precision must be maintained, while using conventional mechanical machine shop fabrication techniques and extensive tooling changes. Economically, fabrication costs of such prior art test socket systems typically require minimum quantity orders in multiple thousands of dollars range.
FIG. 3 shows a cross-section representation of another prior art test socket system that utilizes special “Y”-shaped contactor tips 123 on pins embedded in insulated casings 124, anchored to the test PCB 103 by means of solder connections. (See also U.S. Pat. No. 6,819,127, D. R. Hembree.) A DUT 105 is placed in a recessed cavity formed by casing 124. A conductive sheet 128 is laid over the DUT, and a downward force, applied by appropriately shaped clips 127, is transferred to the DUT by means of rigid lid 126 for establishing and maintaining electrical contact between the connector tips 123 and solder ball connectors 108 on the bottom face of the DUT 105.
The test socket systems like those shown in FIG. 3 do reduce fabrication costs and physical size, but at the expense of significantly increased parasitic inductance associated with the long contactor leads 129. Another problem with test socket system like those of FIG. 3 is the apparent lack of compliance range. Also the heights of the solder balls connectors 108 on the bottom face of a DUT typically vary (are not co-planar). Accordingly some solder balls connectors on the DUT may not electrically connect with by the “Y”-shaped contactor tips 123 of the long leads 129 while others may be deformed (damaged) by the connection. The invented test socket system and test socket architecture addresses and overcomes these kinds of prior art difficulties, e.g., the necessity for ‘interposer elements 34” for effecting electrical connection between a micro array of DUT connectors and a macro array of extending tips of test socket terminals as taught by Hembree, supra. (See U.S. Pat. No. 6,819,127 FIGS. 3a, 3b & 7b)
Other problems with prior art test socket systems and test socket architectures relate to the increasing complexity and number of input/output connectors of current and evolving integrated circuit packages. Also, end-user demand mandates ever smaller and more compact (thin) volumes for electronic appliances, requiring very small volume chip packages with dimensions ranging from tens to hundreds of microns (μm). These trends necessitate architectural reductions in size of mechanical the elements of IC packages, in particular terminals that interconnect IC packages with other electronic components of a particular appliance.
In the past, test socket manufacturers have relied upon conventional mechanical engineering and associated expensive labor intensive, above-and-beyond machine shop techniques to meet the ever-increasing demand for complex testing system and appropriate architecture for test sockets. Currently developed and contemplated IC/semiconductor packages also come in a variety different shapes, sizes, terminal configurations, and machine specific form factors many of which require specially designed test socket architectures to accommodate final testing stages involved in design, in development, in prototyping and in manufacturing of semiconductor/integrated circuit packages.
Versatile, re-configurable test sockets for testing a wide variety of IC/semiconductor packages [DUT] of different sizes, and terminal styles having re-useable elements are currently unavailable from the test socket industry. In short, alternative advanced manufacturing technologies for test sockets must be developed in order to realize high performance electronic appliances at low manufacturing cost.